Capacitive touch sensor

ABSTRACT

This application relates to a projected capacitive touch sensor. The sensor includes a sensor grid including one or more electrically conductive rows and two or more electrically conductive columns. The sensor further includes an adaptive circuit that receives a signal associated with a first portion of the two or more columns and includes a direct route and an attenuator route, the attenuator route including an attenuator circuit for applying an amplitude decrease, an amplitude increase, or a phase shift to the sensor grid&#39;s signal, wherein the adaptive circuit is configured to switch between the direct route and the attenuator route. The sensor further includes a differential circuit that is configured to generate a differential signal based on an output signal from the adaptive circuit and a signal associated with a second portion of the two or more columns.

CROSS REFERENCE TO RELATED APPLICATION

This application claims the benefit of U.S. Patent Application No. 62/139,288, filed Mar. 27, 2015, the contents of which are incorporated by reference.

TECHNICAL FIELD

The present disclosure relates to a projected capacitive touch sensor.

BACKGROUND

Touch-sensitive displays are widely employed for an expanding variety of applications ranging from mobile devices to fixed devices.

Projected Capacitive Technology (PCT) is becoming one of the most significant touch technologies for applications ranging from mobile devices to collaborative business and development. PCT refers to two main sensing methods called “self-capacitance” and “mutual capacitance” offering different performance characteristics and applications. Driven by the increasing number of users of touch-enabled mobile devices, consumer and professional expectations for touch applications have moved far beyond single-touch requirements into the realm of multi-touch and multi-user capabilities.

SUMMARY

One innovative aspect of the subject matter described in this specification may be implemented in a projected capacitive touch sensor that includes a sensor grid including one or more electrically conductive rows and two or more electrically conductive columns; an adaptive circuit that receives a signal associated with a first portion of the two or more columns and includes a direct route and an attenuator route, the attenuator route including an attenuator circuit for applying an amplitude decrease, an amplitude increase, or a phase shift to the sensor grid's signal, wherein the adaptive circuit is configured to switch between the direct route and the attenuator route; and a differential circuit that is configured to generate a differential signal based on a an output signal from the adaptive circuit and a signal associated with a second portion of the two or more columns, where a resistance or a capacitance of the adaptive circuit is sized to render a non-zero differential signal.

These and other implementations can each optionally include one or more of the following features. The sensor includes a sine wave converter with an output connected to an input of one of the one or more rows, the sine wave converter being configured to receive a digital signal and output a sine wave signal with a frequency that matches a frequency of the digital signal; and a processor that receives an output from the differential circuit and that is configured to generate a digital signal that has a duty cycle of less than 100%; transmit the digital signal that has a duty cycle of less than 100% to the sine wave converter; determine that the output from the differential circuit is zero; set a route through the amplitude attenuator to the attenuator route; adjust a duty cycle of the digital signal; and determine that the output of the differential circuit is non-zero.

The attenuator circuit includes a first resistor and a second resistor. The first resistor includes a first terminal that receives the signal associated with the first portion of the two or more columns and a second terminal. The second resistor includes a third terminal that is electrically connected to the second terminal and that transmits the output signal from the adaptive circuit and a fourth terminal that is electrically connected to ground. The direct route of the attenuator circuit is a direct connection without circuit elements. The action of adjusting the duty cycle of the digital signal includes incrementing the duty cycle; determining that a peak of the signal associated with the second portion of the two or more columns corresponds to a valley of the output signal from the adaptive circuit; and setting the incremented duty cycle as an adjusted duty cycle.

The processor is further configured to in response to determining that the output of the differential circuit is non-zero, set the route through the amplitude attenuator to the direct route. The sine wave converter is configured to measure an output of the differential circuit based on a falling edge of the digital signal. The first portion of the two or more electrically conductive columns are connected to a first multiplexer and the second portion of the two or more electrically conductive columns are connected to a second multiplexer. An output of the first multiplexer is connected to the adaptive circuit. An output of the second multiplexer is connected to the differential circuit. The first portion of the one or more electrically conductive columns alternate with the second portion of the one or more electrically conductive columns. The attenuator circuit includes two switches that are configured to switch between the attenuator route and the direct route.

Another innovative aspect of the subject matter described in this specification may be implemented in a method that includes the actions of generating a digital signal that has a duty cycle of less than 100%; transmitting a signal to one or more electrically conductive rows of a projected capacitive touch sensor grid that includes two or more electrically conductive columns; receiving a differential signal from a differential circuit that determines a differential between signals obtained from two of the two or more electrically conductive columns; determining that the differential signal is zero at a falling edge of the digital signal; and based on determining that the differential signal is zero, adjusting a duty cycle of the digital signal and an amplitude attenuator that is connected between the differential circuit and one of the two or more electrically conductive columns.

These and other implementations can each optionally include one or more of the following features. The action of adjusting the amplitude attenuator includes reducing an amplitude of a signal obtained from the one of the two or more columns. The action of adjusting the duty cycle of the digital signal includes incrementing the duty cycle; determining that a peak of a signal obtained from the one of the two or more columns corresponds to valley of a signal obtained from a second one of the two or more columns; and setting the incremented duty cycle as an adjusted duty cycle. The actions include in response to setting the incremented duty cycle as the adjusted duty cycle, disconnecting the amplitude attenuator. The transmitted signal is a sine wave that has a frequency that matches a frequency of the digital signal. The amplitude attenuator includes a first resistor and a second resistor. The first resistor includes a first terminal that receives the signal associated with the one of the two of the two or more electrically conductive columns and a second terminal. The second resistor includes a third terminal that is electrically connected to the second terminal and that transmits an output signal from the amplitude attenuator and a fourth terminal that is electrically connected to ground. The action of adjusting the amplitude attenuator includes switching a route through the amplitude attenuator between a direct route and an attenuator route. The direct route of the amplitude attenuator is a direct connection without circuit elements.

Another innovative aspect of the subject matter described in this specification may be implemented a projected capacitive touch sensor that includes a sensor grid including one or more electrically conductive rows and one or more electrically conductive columns; one or more first column multiplexers that are connected to a first portion of the one or more electrically conductive columns; one or more second column multiplexers that are connected to a second portion of the one or more electrically conductive columns, wherein an input to one of the one or more second column multiplexers is from the first portion of the one or more electrically conductive columns; a differential circuit that is configured to determine a differential between an output of two of the one or more second column multiplexers; and a processor that is configured to determine a polarity of an output of the differential circuit; and switch the polarity of the differential circuit.

Another innovative aspect of the subject matter described in this specification may be implemented in a method that includes the actions of receiving a differential signal from a differential circuit that determines a differential between outputs of two column multiplexers, wherein the two column multiplexers are connected to a first portion of one or more electrically conductive columns of a sensor grid, and wherein one input to one of the two column multiplexers is connected to an electrically conductive column that is adjacent to the first portion of the one or more electrically conductive columns; determining a polarity of the differential signal; and based on determining the polarity of the differential signal, switching the polarity of the differential signal

Other implementations of these aspects include corresponding systems, apparatus, and computer programs recorded on computer storage devices, each configured to perform the operations of the methods and sensors.

The details of one or more implementations of the subject matter described in this specification are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, the drawings, and the claims.

DESCRIPTION OF DRAWINGS

FIG. 1 illustrates in a simplified manner how projected capacitive touch sensing works.

FIG. 2 illustrates components of a projected capacitive touch sensor.

FIG. 3A illustrates a front view of a touch display device based on a projected capacitive touch sensor according to an embodiment of the present disclosure.

FIG. 3B illustrates a top view of a touch display device based on a projected capacitive touch sensor according to an embodiment of the present disclosure.

FIG. 4A illustrates layers of the sensor grid in a face-to-face stacking according to an embodiment of the present disclosure.

FIG. 4B illustrates layers of the sensor grid in a bridged stacking according to an embodiment of the present disclosure.

FIG. 4C illustrates layers of the sensor grid in a dual-side stacking according to an embodiment of the present disclosure.

FIG. 4D illustrates an example clean signal, an example noise signal, and an example signal with noise.

FIG. 4E illustrates two example signals and a differential signal of the two example signals.

FIG. 4F illustrates example signals received from adjacent columns of a sensor grid when a user is not touching the sensor.

FIG. 4G illustrates example signals received from adjacent columns of a sensor grid when a user is touching the sensor.

FIG. 4H illustrates an example sensor grid that includes defined blocks and corresponding multiplexers.

FIG. 5 illustrates an example circuit for amplitude attenuation.

FIG. 6 illustrates an example phase shift between two signals.

FIG. 7 illustrates an example timing diagram for signals of the amplitude attenuator circuit.

FIG. 8 illustrates various signal routes through the amplitude attenuator circuit.

FIGS. 9A-9B illustrate example differential signals.

FIG. 10 illustrates an example process for detecting magnitude peaks.

FIG. 11 illustrates an example process of checking for peaks identified by process of FIG. 10.

FIG. 12 illustrates an example circuit for polarity normalization.

FIG. 13 illustrates the connections of the multiplexers of the circuit for polarity normalization.

FIG. 14 illustrates example circuits for differential readings of consecutive columns.

FIG. 15 shows an example of a computing device and a mobile computing device that can be used to implement the techniques described here.

DETAILED DESCRIPTION

The present disclosure relates to a projected capacitive touch sensor.

FIG. 1 illustrates, in a simplified manner, the working principles of projected capacitive touch sensing technology. 101 is the sensor without an external conductive object in close proximity, while 102 is the sensor with an external conductive object in close proximity. PCT may be based on a grid (or matrix) made of electrically conductive material, having this material as columns and rows. The columns and rows may serve as electrodes. The detection method may be based on interference caused by an external conductive touch object (e.g., finger or conductive pointer that are grounded) on the electrostatic field generated between the rows and columns, more precisely at the interceptions between rows and columns—these interceptions may be designated as nodes. These nodes, electrically speaking, may behave like capacitors, with very low charge capacity, in the pico Farad (pF) range, and with charge variation in the femto Farad (fF) range when externally disturbed (for instance, when touching with the external object). In other words, PCT detects touch by measuring the capacitance at each addressable electrode. When a finger or a conductive object approaches an electrode, it disturbs the electromagnetic field and alters the capacitance. This change in capacitance can be measured by the electronics and then converted into X, Y locations that the system can use to detect touch.

FIG. 2 illustrates components of a projected capacitive touch sensor 200. In an aspect, an alternate current signal is injected (AC signal) in one of the rows 203 and, on each column 201, one may find the same signal with a fraction of the injected signal amplitude. The signal amplitude obtained on each column is the result of the original AC signal passing through the capacitor 202 created at the node (interception) between the selected row and the column. This sensor output amplitude may vary between columns due to physical and electrical differences that may exist for among columns (e.g., equivalent capacitors to each node have different charge capacities, thereof, different output signal values or amplitudes). For example, the electrical signal may be injected in the rows and collected at the columns, but the process works in reverse (one can inject the signals in the columns and collect it at the rows).

The signal amplitude at the columns output may be changed (e.g., it will be smaller or larger) when a conductive object, exterior to the grid, disturbs the electrostatic field created at the node between the row and column. This conductive object is, in this circuit context, the touching or “getting near” finger in the grid which will divert part of that electrostatic field to earth/ground. One may use this difference of signal amplitude (amplitude without touch minus amplitude with touch) to identify the presence of an exterior conductive object, thus, the existence of a touch event.

There are two main types of sensing methods, self-capacitance and mutual capacitance, where each has its own advantages and disadvantages. While for self-capacitance, each electrode is scanned individually, in mutual capacitance each electrode node or intersection is scanned for the determination of a touch event. Mutual capacitance may allow an unlimited number of unambiguous touches, may produce higher resolution than self-capacitance and may be less sensitive to electromagnetic interference (EMI) than self-capacitance. In self-capacitance, due to the scanning method, so-called ghost points may occur so that it may not be possible to unambiguously detect more than one touch event when using rows and columns. However, both types of sensing methods are based on a charge transfer between human-body or touch object and either single electrode or pair of electrodes.

Mutual capacitance is the intentional or unintentional capacitance between two “charge holding objects.” Projected capacitance touch-screens intentionally create mutual capacitance between elements of columns and rows in the vicinity where each intersect the other. This allows the system electronics to measure each node (intersection) individually to detect multiple touches on the screen during one screen scan. When a touch object touches near an intersection or node, some of the mutual capacitance between the row and column is coupled to the touch object, which reduce the capacitance at the intersection as measured by the system electronics. This reduced capacitance crosses the “touch threshold” set by the electronics indicating a touch has occurred.

Touch sensors based on PCT may be scanned as mentioned above. The term “scanned” as used herein may mean that individual electrodes (e.g. rows or columns) intersections or nodes are measured, e.g. one-by-one in a cycle. Mutual-capacitance touch screens may use a scanning method that measures the capacitance at each row and column intersection. In this scanning method, the controller drives a single column (Y) and then scans every row (X) (or vice versa) that intersects with that column, measuring the capacitance value at each X-Y intersection. This process may be repeated for every column and then the entire cycle starts over. The scanning rate may be more than 20 Hz, for example, up to 200 Hz, 400 Hz, or 500 Hz. The sensor grid may have any number of columns and rows, for example, 64-700 columns and 36-400 rows, for example 168 columns and 96 rows.

FIG. 3A illustrates a front view of the projected capacitive touch display device 300 and FIG. 3B illustrates a top view of the projected capacitive touch display device 300. The projected capacitive touch sensor may include a sensor grid 301 with diagonal 305, a display layer 302, a glass (or other transparent, non-conductive material, like acrylic) cover layer 303, one or more controllers 304 and one or more flexible cables 306. The controller, despite being shown at the back of the display, can be located anywhere as long as the flexible cables 306 coming from the sensor film can reach it. Not shown here is the host system (e.g., a regular PC) where the controller 304 and the display 302 are connected. The sensor grid 301 may be laminated to the glass 303 (or other transparent, non-conductive material, like acrylic). The diagonal 305 may exceed 32 inches, preferably may be 40 inches to 90 inches, more preferably may be up to 150 inches.

The layers forming the sensor grid 301, after being stacked up, may create a grid of interceptions between the conductive material (e.g., copper, gold, silver, carbon nanotubes, graphene; generically any conductive material which may allow fine traces, e.g. below 10 μm in width) rows and columns, which are previously created in one or more row or column layers by deposition, printing, etching, electroplating or other method of making conductive structures in (e.g. flexible) substrates (e.g.). Additionally, conductive connecting traces (e.g. buses) are also created at the borders in order to allow the electrical connection of the rows/columns to the flexible cables which will, then, connect to the controller. The rows and their traces may not directly (e.g., conductively) touch/connect electrically to the columns and column traces, e.g., there must may be electrical isolation between rows and columns, being it by spatial separation (zones where rows and columns do not overlap), or being it by using a isolating (e.g., electrically non-conductive) layer (e.g. an optically clear adhesive (OCA)) in between. The isolation material may act as dielectric, e.g., at the interception/node zones.

As used in the present disclosure, the term “controller” and “host system” is intended to encompass any suitable processing device. For example, although FIGS. 3A, 3B illustrate a single backend controller 304, touch display device 300 can be implemented using any number of controllers. Indeed, the controller 304 and the host system may be any computer or processing device such as, for example, a blade server, general-purpose personal computer (PC), Macintosh®, workstation, UNIX®-based workstation, or any other suitable device. In other words, the present disclosure contemplates computers other than general purpose computers, as well as computers without conventional operating systems. Further, the illustrated controller 304 and the host system may be adapted to execute any operating system, including Linux®, UNIX®, Windows®, Mac OS®, or any other suitable operating system. The controller and/or host system may be configured to execute any computer instructions or software that can be used to operate the touch display device 300 or that can provide functionality for one or more users of the touch display device 300, wherein the users may activate the functionality through touching predetermined locations on the cover layer 303, and wherein the touched location is associated with an icon displayed by the display layer 302, and wherein the user-initiated touch event is sensed by the sensor grid 301 and the controller 304. In this manner, the user may activate software or hardware functionality by perturbing the electrical field at a node of a row and a column of the sensor grid 301 by using a finger or a conductive object. For example, the perturbation of the electrical field triggers an action of software running on the controller 304 or host system.

FIG. 4A illustrates layers of the sensor grid 301, 400 a in a face-to-face stacking according to an embodiment of the present disclosure. The sensor grid may comprise one or more layers, which may be at least one of: conductive row layer 403 a, conductive column layer 401 a, optically clear adhesives 402 a, substrates, covers, or additional dielectric bridges. For example, the sensor grid 301, 400 a may include a conductive row layer 403 a, a conductive column layer 401 a and an optically clear adhesive (OCA) 402 a. The rows 405 a and columns 404 a may be electrodes that are conductively connected via cables or wires 406 a with the controller 304. FIG. 4A illustrates the sensor grid before and after lamination, and relative to the display layer 302. The materials used for the bridges and the OCA may be optically clear or transparent, and/or flexible materials, for example, materials with maximum haze below about 1%, and/or, with minimum light transmission, for example, above about 99%, for example an acrylic adhesive. The properties for bridge material may be: transparent, non-conductive, flexible, and/or dielectric constant substantially equivalent to glass, acrylic, or polyester.

The sensor grid layers stacking may be dependable on how the conductive rows and columns are created. There are three layer stacking configurations normally used: separated rows and columns layers facing each other (face to face stacking, FIG. 4A), rows and columns in the same layer (bridged stacking, FIG. 4B), rows and columns on opposite side of the same layer (dual side, FIG. 4C). The substrate layers (where the rows and columns will be created) and the cover layers may be polyethylene terephthalate (PET) films or other types of at least partially transparent (e.g. within or across the visible spectrum) and flexible materials. For example, polymethylpentene (PMP), polypropylene (PP), polycarbonate (PC), polyvinyl chloride (PVC), poly(methyl methacrylate) (PPMA), polystyrene (PS), styrene acrylonitrile (SAN), among others. Also, a flexible glass material can be used. In the next sub-sections, the aforementioned configurations are illustrated.

In this face-to-face stacking configuration 400 a, the rows and the columns are created in separated layers, with the printed side facing each other. To isolate them electrically and, at the same time, act as dielectric, and to bond them when laminated, one may use a non-conductive layer of optically clear adhesive (OCA). The flexible cables may be bonded or soldered to the corresponding traces or buses (before or after the layer lamination, depending on the production process used).

FIG. 4B illustrates layers of the sensor grid 301, 400 b in a bridged stacking according to an embodiment of the present disclosure. The sensor grid may comprise one or more layers, which may be at least one of: a layer 408 b shared by conductive rows 405 b and conductive columns 404 b, optically clear adhesives 402 b, substrates, covers 407 b, or additional dielectric bridges. For example, the sensor grid 301, 400 b may include a layer 408 b shared by conductive rows 405 b and conductive columns 404 b (e.g., rows and columns in the same layer 408 b), and an optically clear adhesive (OCA) positioned between each row 405 b and column 404 b at the respective row-column-nodes. The rows 405 b and columns 404 b may be electrodes that are conductively connected via cables or wires 406 a with the controller 304. FIG. 4B illustrates the sensor grid before and after lamination, and relative to the display layer 302.

In this bridged stacking configuration 400 b, the rows and the columns may be created in the same layer 408 b, having a transparent non-conductive material (e.g. OCA) between them where their projections spatially overlap. These non-conductive material blocks are called dielectric bridges. They may isolate electrically the rows and columns and act as dielectric. Also, it is used a cover layer to close and protect the rows and columns traces and an OCA layer to bond them when laminated. The flexible cables 406 a may be bonded or soldered to the corresponding buses (before or after the layer lamination, depending on the production process used).

FIG. 4C illustrates layers of the sensor grid 301, 400 c in a dual-side stacking according to an embodiment of the present disclosure. The sensor grid may comprise one or more layers, which may be at least one of: a layer 408 c shared by conductive rows 405 c and conductive columns 404 c, optically clear adhesives 402 c, substrates, covers 407 c, or additional dielectric bridges. For example, the sensor grid 301, 400 c may include a layer 408 c shared by conductive rows 405 c and conductive columns 404 c (e.g., rows and columns on opposite side of the same layer 408 c), and one or more optically clear adhesive (OCA) layers positioned between layer 408 c and one or more cover layers 407 c. The rows 405 c and columns 404 c may be electrodes that are conductively connected via cables or wires 406 c with the controller 304. FIG. 4B illustrates the sensor grid before and after lamination, and relative to the display layer 302.

In this dual-side stacking configuration 400 c, the rows and the columns may be created in the same layer 408 c, but on opposite sides, e.g., having the layer substrate 408 c, the rows are created on the top side (e.g. top surface) and the columns on the bottom side (e.g., bottom surface), or vice-versa, of the shared layer 408 c. The substrate layer may act as isolator and a dielectric. One may use a cover layer 407 c on each side of the layer 408 c to close and protect the rows and columns traces and the one or more OCA layers 402 c, e.g., also on each side to bond them when laminated. The flexible cables 406 a connect the rows and columns to the controller 304, e.g. cables 406 a may be bonded or soldered to the corresponding traces or buses (before or after the layer lamination, depending on the production process used).

Projected capacitive technology may be sensitive to external sources of interference (noise), specifically external electrostatic and electromagnetic fields. These sources can be electromagnetic fields generated by electric equipment and devices nearby the sensor grid, for instance an LCD. These external electromagnetic fields add themselves to the grid electrostatic/electromagnetic field, therefore changing the signal readouts and, consequently, report false touch events (false touches). Others external noise sources can be: the mains power lines, support equipment and devices (PC, monitors, etc) with noisy power supplies. FIG. 4D illustrates an example clean signal 410 d, an example noise signal 405 d, and an example signal with noise 415 d. The noise signal 405 d may be caused by the external noise sources and when combined with the clean signal 410 d produces the signal with noise 415 d. The external noise sources may be affect many circuits and affect nearby portions of the circuit with the same phase and amplitude. Therefore, the noise signal is acquired by all neighboring columns with the same intensity at each time instant. This type of noise is referred to as common mode noise.

When using analog to digital conversion circuits, common mode noise that is measured along with the signal is, in some implementations, neutralized with the application of signal processing techniques after measuring the analog signal and converting it, for example, to a digital signal. In some implementations, a circuit may eliminate the common mode noise component (or, at least, reduce it down to negligible levels, e.g., below 10% or below 1% of the signal magnitude) using differential analog signal processing.

A differential signal is characterized as the resulting signal from the difference of two absolute signals. If those two signals have any common signal component, it will be eliminated in the differentiation process. The resulting differential signal will be just the difference of the signals and may be converted to a digital value. FIG. 4E illustrates two example signals 405 e and 410 e and a differential signal 415 e of the two example signals. The differential signal 415 e is the difference of signal 405 e minus signal 410 e.

A sinusoidal signal may be injected in the selected row of the circuit described in this specification to charge the capacitors created by the interception nodes between the row and the columns. With every combination of two adjacent columns, the differential signal is calculated for each pair. These differential signals can be positive or negatives, having zero voltage, or ground, as reference.

Without touching the touchscreen surface, these signals are zero, or equal to a reference voltage, at any time. In some implementations, as the capacitors/nodes are electrically different (e.g., have slightly different charge capacities), the idle state differential signals have distinct signal levels. Therefore, a signal level normalization may be used before the digital signal processing stage. With capacitors/nodes that have equal charge capacity, their respective signal values is shown in FIG. 4F. When a finger is close or touching one of the interception nodes, the differential signal values for that node and its adjacent nodes will change, creating an oscillation curve shown in FIG. 4G.

To minimize the time needed to read and convert all the nodes, or cells, in the foil grid, and to achieve a grid of specific size, such as 96 rows by 168 columns, the 168 columns are divided in multiple (e.g., three) reception blocks. For example, the 168 columns are divided in three blocks (56 columns in each block) and each block is handled separately.

FIG. 4H illustrates an example sensor grid 405 h that includes defined blocks 410 h, 415 h, and 420 h and corresponding multiplexers 425 h, 430 h, and 435 h. Other sensor grids may be divided into N blocks, being N a number equal or higher than 2. This configuration allows the simultaneous signal reception and conversion from the three blocks, reducing the total time needed to read the whole grid.

Each block 410 h, 415 h, and 420 h feeds a multiplexing circuit 425 h, 430 h, and 435 h composed of two multiplexers. For example, one multiplexer may be configured to multiplex 29 inputs to 1 output—29:1—and another multiplexer configured to mux 28 inputs to 1 output—28:1. In some implementations, a multiplexer may also multiplex 1 input to 1 output.

Each multiplexer pair for each block allows the simultaneous selection of two adjacent columns and, for each selection, the same multiplexers pass the selected columns signals to the differential circuit. The differential signals are converted to digital values. This configuration removes the noise common to all columns pairs, such as noise from an exterior source such as an LCD.

In some implementations, a touch sensor electronics controller that is connected to a capacitive sensor is tuned electronically and programmed for that particular sensor, so it can be adjusted to the sensor size. The size and aspect ratio of the sensor may define the capacitance and resistance of the electrodes, e.g., sensors with different sizes and/or aspect ratios will have different capacitance and/or resistance, causing different signal phase shifts. The phase shifts in the signals may be caused by the capacitance or electrode resistance or both, which, when combined, will act as a resistor-capacitor (RC) filter, thus, resulting in a phase shifted signal compared to the injected signal in the sensor, typically used as a reference when reading the signals. In some implementations, a single electronics controller is ready to be connected to different size and/or aspect ratio sensors, which may automatically adapt to the sensor capacitance and resistance. In other words, an adaptive circuit may be connected to different sensors that cause different phase shifts on the signals that are read from the sensor.

In FIG. 5, the touch sensor 505 includes a set of rows and a set of columns with the set of rows over the set of columns and a grid of nodes can be obtained from the intersections between the rows and columns.

An alternate current signal 510 is injected (AC signal) in each one of the rows, one or more at a time, each with a different signal frequency. Then, on each column, we'll find the same signal with a fraction of the injected signal amplitude.

The signal amplitude obtained on each column is the result of the original AC signal 510 passing through the capacitor created at the node, or intersection, between the selected row and the column. The sensor output amplitude may vary between columns due to physical and electrical differences that may exist among columns, e.g., capacitors at each node may have different charge capacities thus causing different output signal values or amplitudes.

In some implementations, the signal 510 is injected in the rows and collected at the columns, but the process works in reverse. For example, the signal may be injected in the columns and collected at the rows.

The obtained signal on the columns may suffer a shift in its phase in relation with the injected AC signal phase, as illustrated in FIG. 6, that may be caused by the rows and columns conductive material resistance and/or the inherent capacitance, and also by the injection and acquisition circuitry that, in some implementations, is similar in all rows and columns and, thus, can be disregarded.

Returning to FIG. 5, the injected AC signal 510 is generated from a pulse width modulation (PWM) signal 520 coming from the microprocessor (MCU) 515. This PWM signal may be a square wave signal, with a duty cycle of less than 100%, such as 25%, 50%, or 75%, that is placed at the input of a signal converter (SC) 525, such as a square to sine wave converter, to convert it to a sine wave signal and, then, injected in the rows.

At the same time or about the same time, a second PWM signal (PWC), with the same period or about the same period as the first PWM signal, is also generated by the MCU and looped back to it so it can trigger the signal conversion process (ADC) of the acquired signals at the columns. The ADC is triggered at the falling edge of the PWM signal.

FIG. 7 illustrates the timing of the PWM signal 705, the injected AC signal 710, the acquired AC signal 715, and the PWC signal 720. To convert the injected signal 710 or the acquired signal 715 at the peaks or valleys of the signal wave, the duty cycle of the PWC signal 525 should be defined so the conversion trigger fires when a peak or valley is reached.

The following description describes a way to check the duty cycle for the PWC regardless of the sensor size and/or its electrical characteristics. FIG. 10 illustrates the process of this method.

The acquired AC signal, e.g., the acquired AC signal 715, is an output of a differential circuit. In some implementations, two adjacent columns may output the signal with same amplitude and phase. As illustrated in FIG. 9A, C1=C2, for example, the amplitude of the signals is the same or the phase of the signals is the same or both the phase and amplitude are the same, the differential circuit will output an acquired AC signal equal to zero (or flat), without no peaks and valleys. In some implementations, all columns may output the signal with the same amplitude and phase regardless the combination of columns selected. To override this, the circuit should artificially create a column signal to be different from the other column signal we are differentiating (i.e., artificially create a C1≠C2 scenario as illustrated in FIG. 9B).

The artificial change on the column signal can be implemented, as shown in FIG. 8, by adding an adaptive circuit 805 before the differential circuit 810 input for that column, wherein the adaptive circuit 805 includes an attenuator circuit, arranged in an attenuator route 815, that is configured to apply an amplitude decrease, an amplitude increase, or a phase shift to an amplitude of a signal received from the sensor grid. The adaptive circuit 805 may further include a direct signal route 820 that is configured to guide the sensor grid signal to the differential circuit 810 input without substantial (e.g., less than 1%) signal amplitude attenuation. The amplitude attenuator 805 is configured to switch between the direct route 820 and the attenuator route 815. In more detail, the adaptive circuit 805 is comprised by two switches of type SPDT (single pole double throw) or two multiplexers (1:2), implementing a signal dual route commuter, having one direct route 820 connecting the column directly to the differential circuit and the other attenuator route 815 with the signal attenuator circuit between the column output and the differential circuit input. The attenuator circuit may act as a resistor-capacitor (RC) filter.

The attenuator circuit may cause an amplitude decrease, amplitude increase, or phase shift. The objective may be to create a known signal disturbance to result in a non-flat (e.g. non-zero) differential output (e.g., C1≠C2 as illustrated in FIG. 9B).

The adaptive circuit 805 generates a different differential if the differential readings received from the multiplexer (MUX) are identical. Therefore, when selecting a column pair, if zero differential readings (e.g., C1=C2 as illustrated in FIG. 9A) are obtained with the regular circuit, the amplitude attenuator or attenuator circuit is set to generate non-zero differential reading (e.g., C1<C2 or C2>C1) using the attenuator route 815. When selecting a column pair, if non-zero differential readings (e.g., C1≠C2 as illustrated in FIG. 9B) are obtained, the direct route 820 is used instead. The resistance and/or capacity of the adaptive circuit may be sized to render the non-zero differential signal. For example, the resistance and/or capacity of the direct route 820 and/or the attenuator route 815 may be sized to render the non-zero differential signal.

FIG. 10 illustrates an example process 1000 for detecting magnitude peaks. The process 1000 may be used by an amplitude attenuator to reduce the amplitude of a wave signal coming from the multiplexer without disturbing the waveform of the signal.

With the multiplexer the signal provided from the sensor foil is processed and the duty cycle is calculated (1005). To calculate the duty cycle, the wave signal is read by selecting pair of consecutive columns (1010) using the direct path (e.g., the direct route 820) (1015). On the selected column pair, a check for magnitude signal peaks is executed to determine a differential reading (1020). When performing this operation, the process may find peaks or not find any peaks (1025).

When selecting a column pair, a few preliminary differential reading are performed using the regular circuit. If zero differential readings are obtained (e.g., C1=C2 as illustrated in FIG. 9A), the amplitude attenuator (1030) is set to generate non-zero differential reading (C1<C2 or C2>C1). If non-zero differential readings are obtained, the regular circuit is used instead, and the amplitude attenuator is not set.

The search for peaks (1025 and 1040) on the selected pair of columns (1050) is performed until peaks are found. When the peak is found, the duty cycle is, at this point defined and, thus, signal acquisition and processing in normal operation can be performed (1045).

FIG. 11 illustrates an example process 1100 of analyzing peaks (1105) identified by process 1000. To begin the process, the duty cycle is initialized (1110, 1115, and 1120). The duty cycle is the percentage of one period in which a signal is active, and a period is the time it takes for a signal to complete an on-and-off cycle.

At the beginning both initial and maximum duty cycle are equal to zero (1110, 1115, and 1120). To identify the maximum duty cycle the electrical signal is read, and progressively all values are read (1130) and retained (1135), including each maximum value. In some implementations, the electrical signal uses less than a 100% duty cycle, such as 25%, 50%, or 75%, and if this is the case, it can be set the working duty cycle (1150). If the duty cycle is equal to 100% the process to convert the electrical signal has to be restarted (1145), using another column pair, to enable checking for electrical peaks which can give a duty cycle different from 100%.

In some implementations, the processes 1000 and 1100 occur upon powering of a device that includes the touchscreen. For example, each time a user turns on a mobile phone, the touchscreen circuitry will execute processes 1000 and 1100 to identify a duty cycle. In some implementations, the processes 1000 and 1100 occur once, such as during testing of a newly manufactured mobile phone. Executing the processes 1000 and 1100 increments the duty cycle until a difference between an injected AC signal and an acquired AC signal is maximized or nearly maximized.

To identify a correct duty cycle, the attenuator route (e.g., the attenuator route 815), is activated to cause an artificial difference between the signals read from two adjacent columns. By causing an artificial difference, the differential between two adjacent columns is more prominent, thus enabling the touchscreen to more quickly identify the proper duty cycle. During normal operation of the touchscreen the direct route (e.g., the direct route 820) is activated.

FIG. 12 is a schematic of a circuit to perform polarity normalization on a differential operation. In each 56 columns block, for example, column block 1205, there are two multiplexers, for example, multiplexers 1210. One multiplexer selects the odd columns and the other selects the even columns, thus always selecting one odd column and one even column. In FIG. 13, the connections between the columns and the multiplexers are illustrated in more detail (using a 16 column block).

To read the differential for consecutive columns, FIG. 13 illustrates the following differential pairs for the 16 columns:

MuxA_S0-MuxB_S0, differential between O15 (anterior) and O0

MuxA_S1-MuxB_S0, differential between O1 and O0

MuxA_S1-MuxB_S1, differential between O1 and O2

MuxA_S2-MuxB_S1, differential between O3 and O2

MuxA_S2-MuxB_S2, differential between O3 and O4

MuxA_S3-MuxB_S2, differential between O5 and O4

MuxA_S3-MuxB_S3, differential between O5 and O6

MuxA_S4-MuxB_S3, differential between O7 and O6

MuxA_S4-MuxB_S4, differential between O7 and O8

MuxA_S5-MuxB_S4, differential between O9 and O8

MuxA_S5-MuxB_S5, differential between O9 and O10

MuxA_S6-MuxB_S5, differential between O11 and O10

MuxA_S6-MuxB_S6, differential between O11 and O12

MuxA_S7-MuxB_S6, differential between O13 and O12

MuxA_S7-MuxB_S7, differential between O13 and O14

MuxA_S8-MuxB_S7, differential between O15 and O14

As described in the above pairs, the S0 input of MUX A is not connected to the block. The S0 input shares the O15 column with the previous block, for example, specifically with the S8 input of MUX A in the previous block. This configuration allows selection and differentiation of the last column of the previous block and the first column of the actual block. FIG. 14 illustrates data continuity at the block separation zones.

In some implementations, the S0 input from MUX A in the first block is connected, like the S0 input from MUX B, to O0 column of the same block. Not having previous blocks, and for multiplexer addressing coherence in all blocks and electrical stability at the differential circuits, the first differential value of the first block (MuxA_S0-MuxB_S0) will be zero, i.e., the first value from the first block will always be discarded.

The differential readings of N columns (having N as an even number) will return N−1 valid values and 1 dummy value to be discarded. In some implementations, there are 168 columns, which will provide 165 valid values and 1 dummy value.

In each block, after the multiplexers, there's a double switch to perform polarity normalization on the differential operation. This may be necessary because the consecutive multiplexers addressing will invert the column order in each selected pair. In some implementations, the differential circuit has a positive input (diffA) and one negative input (diffB), to which the multiplexers outputs of a respective block are connected. For example, for the first 5 selectable column pairs (as described above):

MuxA_S0-MuxB_S0, differential between O15 (anterior) and O0

MuxA_S1-MuxB_S0, differential between O1 and O0

MuxA_S1-MuxB_S1, differential between O1 and O2

MuxA_S2-MuxB_S1, differential between O3 and O2

MuxA_S2-MuxB_S2, differential between O3 and O4

Based on these pairs, columns are layered from left to right (O15 (previous block), O0, O1, O2, O3, and O4). To keep the same polarity at all consecutive differential pairs, the differentials should be computed such that the left column of the working pair is connected to input diffA and the right column of the working pair is connected to input diffB. But, using only the multiplexers addressing, this may only happen with the even address values, while the odd address values invert the columns positions that are related to the differential inputs diffA and diffB:

MuxA_S0-MuxB_S0, differential between O15 (previous) and O0→O15 (previous<left column> to diffA and O0<right column> to diffB

MuxA_S1-MuxB_S0, differential between O1 and O0→O1<right column> to diffA and O0<left column> to diffB=INVERTED!

MuxA_S1-MuxB_S1, differential between O1 and O2→O1<left column> to diffA and O2<right column>

MuxA_S2-MuxB_S1, differential between O3 and O2→O3<right column> to diffA and O2<left column>=INVERTED!

MuxA_S2-MuxB_S2, differential between O3 and O4→O3<left column> to diffA and O4<right column>

The double switch solves this issue, inverting the columns right before the differential inputs when the address value is odd and the address value least significant bit is used to activate the double switch.

FIG. 15 shows an example of a computing device 1500 and a mobile computing device 1550 that can be used to implement the techniques and methods (e.g. the methods described in context of FIGS. 10 and 11) described here. The computing device 1500 is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The mobile computing device 1550 is intended to represent various forms of mobile devices, such as personal digital assistants, cellular telephones, smart-phones, and other similar computing devices. The components shown here, their connections and relationships, and their functions, are meant to be examples only, and are not meant to be limiting.

The computing device 1500 includes a processor 1502, a memory 1504, a storage device 1506, a high-speed interface 1508 connecting to the memory 1504 and multiple high-speed expansion ports 1510, and a low-speed interface 1512 connecting to a low-speed expansion port 1514 and the storage device 1506. Each of the processor 1502, the memory 1504, the storage device 1506, the high-speed interface 1508, the high-speed expansion ports 1510, and the low-speed interface 1512, are interconnected using various busses, and may be mounted on a common motherboard or in other manners as appropriate. The processor 1502 can process instructions for execution within the computing device 1500, including instructions stored in the memory 1504 or on the storage device 1506 to display graphical information for a GUI on an external input/output device, such as a display 1516 coupled to the high-speed interface 1508. In other implementations, multiple processors and/or multiple buses may be used, as appropriate, along with multiple memories and types of memory. Also, multiple computing devices may be connected, with each device providing portions of the necessary operations (e.g., as a server bank, a group of blade servers, or a multi-processor system).

The memory 1504 stores information within the computing device 1500. In some implementations, the memory 1504 is a volatile memory unit or units. In some implementations, the memory 1504 is a non-volatile memory unit or units. The memory 1504 may also be another form of computer-readable medium, such as a magnetic or optical disk.

The storage device 1506 is capable of providing mass storage for the computing device 1500. In some implementations, the storage device 1506 may be or contain a computer-readable medium, such as a floppy disk device, a hard disk device, an optical disk device, or a tape device, a flash memory or other similar solid state memory device, or an array of devices, including devices in a storage area network or other configurations. Instructions can be stored in an information carrier. The instructions, when executed by one or more processing devices (for example, processor 1502), perform one or more methods, such as those described above. The instructions can also be stored by one or more storage devices such as computer- or machine-readable mediums (for example, the memory 1504, the storage device 1506, or memory on the processor 1502).

The high-speed interface 1508 manages bandwidth-intensive operations for the computing device 1500, while the low-speed interface 1512 manages lower bandwidth-intensive operations. Such allocation of functions is an example only. In some implementations, the high-speed interface 1508 is coupled to the memory 1504, the display 1516 (e.g., through a graphics processor or accelerator), and to the high-speed expansion ports 1510, which may accept various expansion cards (not shown). In the implementation, the low-speed interface 1512 is coupled to the storage device 1506 and the low-speed expansion port 1514. The low-speed expansion port 1514, which may include various communication ports (e.g., USB, Bluetooth, Ethernet, wireless Ethernet) may be coupled to one or more input/output devices, such as a keyboard, a pointing device, a scanner, or a networking device such as a switch or router, e.g., through a network adapter.

The computing device 1500 may be implemented in a number of different forms, as shown in the figure. For example, it may be implemented as a standard server 1520, or multiple times in a group of such servers. In addition, it may be implemented in a personal computer such as a laptop computer 1522. It may also be implemented as part of a rack server system 1524. Alternatively, components from the computing device 1500 may be combined with other components in a mobile device (not shown), such as a mobile computing device 1550. Each of such devices may contain one or more of the computing device 1500 and the mobile computing device 1550, and an entire system may be made up of multiple computing devices communicating with each other.

The mobile computing device 1550 includes a processor 1552, a memory 1564, an input/output device such as a display 1554, a communication interface 1566, and a transceiver 1568, among other components. The mobile computing device 1550 may also be provided with a storage device, such as a micro-drive or other device, to provide additional storage. Each of the processor 1552, the memory 1564, the display 1554, the communication interface 1566, and the transceiver 1568, are interconnected using various buses, and several of the components may be mounted on a common motherboard or in other manners as appropriate.

The processor 1552 can execute instructions within the mobile computing device 1550, including instructions stored in the memory 1564. The processor 1552 may be implemented as a chipset of chips that include separate and multiple analog and digital processors. The processor 1552 may provide, for example, for coordination of the other components of the mobile computing device 1550, such as control of user interfaces, applications run by the mobile computing device 1550, and wireless communication by the mobile computing device 1550.

The processor 1552 may communicate with a user through a control interface 1558 and a display interface 1556 coupled to the display 1554. The display 1554 may be, for example, a TFT (Thin-Film-Transistor Liquid Crystal Display) display or an OLED (Organic Light Emitting Diode) display, or other appropriate display technology. The display interface 1556 may comprise appropriate circuitry for driving the display 1554 to present graphical and other information to a user. The control interface 1558 may receive commands from a user and convert them for submission to the processor 1552. In addition, an external interface 1562 may provide communication with the processor 1552, so as to enable near area communication of the mobile computing device 1550 with other devices. The external interface 1562 may provide, for example, for wired communication in some implementations, or for wireless communication in other implementations, and multiple interfaces may also be used.

The memory 1564 stores information within the mobile computing device 1550. The memory 1564 can be implemented as one or more of a computer-readable medium or media, a volatile memory unit or units, or a non-volatile memory unit or units. An expansion memory 1574 may also be provided and connected to the mobile computing device 1550 through an expansion interface 1572, which may include, for example, a SIMM (Single In Line Memory Module) card interface. The expansion memory 1574 may provide extra storage space for the mobile computing device 1550, or may also store applications or other information for the mobile computing device 1550. Specifically, the expansion memory 1574 may include instructions to carry out or supplement the processes described above, and may include secure information also. Thus, for example, the expansion memory 1574 may be provide as a security module for the mobile computing device 1550, and may be programmed with instructions that permit secure use of the mobile computing device 1550. In addition, secure applications may be provided via the SIMM cards, along with additional information, such as placing identifying information on the SIMM card in a non-hackable manner.

The memory may include, for example, flash memory and/or NVRAM memory (non-volatile random access memory), as discussed below. In some implementations, instructions are stored in an information carrier. that the instructions, when executed by one or more processing devices (for example, processor 1552), perform one or more methods, such as those described above. The instructions can also be stored by one or more storage devices, such as one or more computer- or machine-readable mediums (for example, the memory 1564, the expansion memory 1574, or memory on the processor 1552). In some implementations, the instructions can be received in a propagated signal, for example, over the transceiver 1568 or the external interface 1562.

The mobile computing device 1550 may communicate wirelessly through the communication interface 1566, which may include digital signal processing circuitry where necessary. The communication interface 1566 may provide for communications under various modes or protocols, such as GSM voice calls (Global System for Mobile communications), SMS (Short Message Service), EMS (Enhanced Messaging Service), or MMS messaging (Multimedia Messaging Service), CDMA (code division multiple access), TDMA (time division multiple access), PDC (Personal Digital Cellular), WCDMA (Wideband Code Division Multiple Access), CDMA2000, or GPRS (General Packet Radio Service), among others. Such communication may occur, for example, through the transceiver 1568 using a radio-frequency. In addition, short-range communication may occur, such as using a Bluetooth, WiFi, or other such transceiver (not shown). In addition, a GPS (Global Positioning System) receiver module 1570 may provide additional navigation- and location-related wireless data to the mobile computing device 1550, which may be used as appropriate by applications running on the mobile computing device 1550.

The mobile computing device 1550 may also communicate audibly using an audio codec 1560, which may receive spoken information from a user and convert it to usable digital information. The audio codec 1560 may likewise generate audible sound for a user, such as through a speaker, e.g., in a handset of the mobile computing device 1550. Such sound may include sound from voice telephone calls, may include recorded sound (e.g., voice messages, music files, etc.) and may also include sound generated by applications operating on the mobile computing device 1550.

The mobile computing device 1550 may be implemented in a number of different forms, as shown in the figure. For example, it may be implemented as a cellular telephone 1580. It may also be implemented as part of a smart-phone 1582, personal digital assistant, or other similar mobile device.

Various implementations of the systems and techniques described here can be realized in digital electronic circuitry, integrated circuitry, specially designed ASICs (application specific integrated circuits), computer hardware, firmware, software, and/or combinations thereof. These various implementations can include implementation in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device.

These computer programs (also known as programs, software, software applications or code) include machine instructions for a programmable processor, and can be implemented in a high-level procedural and/or object-oriented programming language, and/or in assembly/machine language. As used herein, the terms machine-readable medium and computer-readable medium refer to any computer program product, apparatus and/or device (e.g., magnetic discs, optical disks, memory, Programmable Logic Devices (PLDs)) used to provide machine instructions and/or data to a programmable processor, including a machine-readable medium that receives machine instructions as a machine-readable signal. The term machine-readable signal refers to any signal used to provide machine instructions and/or data to a programmable processor.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a client computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.

The computing system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

Although a few implementations have been described in detail above, other modifications are possible. For example, while a client application is described as accessing the delegate(s), in other implementations the delegate(s) may be employed by other applications implemented by one or more processors, such as an application executing on one or more servers. In addition, the logic flows depicted in the figures do not require the particular order shown, or sequential order, to achieve desirable results. In addition, other actions may be provided, or actions may be eliminated, from the described flows, and other components may be added to, or removed from, the described systems. Accordingly, other implementations are within the scope of the following claims. 

What is claimed is:
 1. A projected capacitive touch sensor, comprising: a sensor grid including one or more electrically conductive rows and two or more electrically conductive columns; an adaptive circuit that receives a signal associated with a first portion of the two or more columns and includes a direct route and an attenuator route, the attenuator route including an attenuator circuit for applying an amplitude decrease, an amplitude increase, or a phase shift to the sensor grid's signal, wherein the adaptive circuit is configured to switch between the direct route and the attenuator route; and a differential circuit that is configured to generate a differential signal based on a an output signal from the adaptive circuit and a signal associated with a second portion of the two or more columns, wherein a resistance or a capacitance of the adaptive circuit is sized to render a non-zero differential signal.
 2. The sensor of claim 1, further comprising: a sine wave converter with an output connected to an input of one of the one or more rows, the sine wave converter being configured to receive a digital signal and output a sine wave signal with a frequency that matches a frequency of the digital signal; and a processor that receives an output from the differential circuit and that is configured to: generate a digital signal that has a duty cycle of less than 100%; transmit the digital signal that has a duty cycle of less than 100% to the sine wave converter; determine that the output from the differential circuit is zero; set a route through the amplitude attenuator to the attenuator route; adjust a duty cycle of the digital signal; and determine that the output of the differential circuit is non-zero.
 3. The sensor of claim 1, wherein the attenuator circuit includes a first resistor and a second resistor.
 4. The sensor of claim 3, wherein: the first resistor includes a first terminal that receives the signal associated with the first portion of the two or more columns and a second terminal, the second resistor includes a third terminal that is electrically connected to the second terminal and that transmits the output signal from the adaptive circuit and a fourth terminal that is electrically connected to ground.
 5. The sensor of claim 1, wherein the direct route of the attenuator circuit is a direct connection without circuit elements.
 6. The sensor of claim 2, wherein adjusting the duty cycle of the digital signal comprises: incrementing the duty cycle; determining that a peak of the signal associated with the second portion of the two or more columns corresponds to a valley of the output signal from the adaptive circuit; and setting the incremented duty cycle as an adjusted duty cycle.
 7. The sensor of claim 2, wherein the processor is further configured to: in response to determining that the output of the differential circuit is non-zero, set the route through the amplitude attenuator to the direct route.
 8. The sensor of claim 2, wherein the processor is further configured to: measure an output of the differential circuit based on a falling edge of the digital signal.
 9. The sensor of claim 1, wherein: the first portion of the two or more electrically conductive columns are connected to a first multiplexer and the second portion of the two or more electrically conductive columns are connected to a second multiplexer, an output of the first multiplexer is connected to the adaptive circuit, and an output of the second multiplexer is connected to the differential circuit.
 10. The sensor of claim 9, wherein the first portion of the one or more electrically conductive columns alternate with the second portion of the one or more electrically conductive columns.
 11. The sensor of claim 1, wherein the attenuator circuit includes two switches that are configured to switch between the attenuator route and the direct route.
 12. A method comprising: generating a digital signal that has a duty cycle of less than 100%; transmitting a signal to one or more electrically conductive rows of a projected capacitive touch sensor grid that includes two or more electrically conductive columns; receiving a differential signal from a differential circuit that determines a differential between signals obtained from two of the two or more electrically conductive columns; determining that the differential signal is zero at a falling edge of the digital signal; and based on determining that the differential signal is zero, adjusting a duty cycle of the digital signal and an amplitude attenuator that is connected between the differential circuit and one of the two or more electrically conductive columns.
 13. The method of claim 12, wherein adjusting the amplitude attenuator comprises: reducing an amplitude of a signal obtained from the one of the two or more columns.
 14. The method of claim 12, wherein adjusting the duty cycle of the digital signal comprises: incrementing the duty cycle; determining that a peak of a signal obtained from the one of the two or more columns corresponds to valley of a signal obtained from a second one of the two or more columns; and setting the incremented duty cycle as an adjusted duty cycle.
 15. The method of claim 14, comprising: in response to setting the incremented duty cycle as the adjusted duty cycle, disconnecting the amplitude attenuator.
 16. The method of claim 12, wherein the transmitted signal is a sine wave that has a frequency that matches a frequency of the digital signal.
 17. The method of claim 12, wherein the amplitude attenuator includes a first resistor and a second resistor.
 18. The method of claim 17, wherein: the first resistor includes a first terminal that receives the signal associated with the one of the two of the two or more electrically conductive columns and a second terminal, the second resistor includes a third terminal that is electrically connected to the second terminal and that transmits an output signal from the amplitude attenuator and a fourth terminal that is electrically connected to ground.
 19. The method of claim 12, wherein adjusting the amplitude attenuator comprises: switching a route through the amplitude attenuator between a direct route and an attenuator route.
 20. The method of claim 19, wherein the direct route of the amplitude attenuator is a direct connection without circuit elements. 